The present invention pertains to the support of work pieces such as semiconductor wafers, and in particular to support of work pieces during grinding or polishing. Presently, conventional semiconductor wafers on which circuit patterns are formed on one side (a front side) are subjected to a grinding process so as to reduce the overall thickness of the wafer. Grinding is performed on the back surface of the wafer where there is no circuitry pattern. The resultant thinning of the wafer allows for the production of thinner packaged electronic chips, microchips, and the like. Additionally, the thinning facilitates backside inspection of the wafer, such as by examining infrared optical and thermal emissions from the backside of the wafer, resulting from the selective excitation of devices on the front side of the wafer. In some instances, the thickness of a microchip cannot exceed a predefined thickness. Various other advantages are achieved by reducing the thickness of the wafers.
One industry technique for grinding the backside of a wafer is to use a taping tool to apply a tape layer to the front side of the wafer using adhesive in order to cover and protect the circuitry devices on the front side of the wafer during backside grinding. The front side of the wafer, with the tape adhered thereto, is then placed against a chuck of a grinding system and held in place, such as with a vacuum applied through holes, pores, channels or the like in the chuck. Backside grinding is then accomplished using a grinding wheel of a grinding system, which is applied to the backside of the wafer using a force and with a relative rotational force. Following grinding, the front side of the wafer is de-taped using a de-taping tool that pulls the tape off of the front side of the wafer prior to dicing of the wafer into chips that are then packaged and assembled.
Problematically, the taping and de-taping process results in cracking of the wafer in some cases, especially for wafers thinned below a 200 μm thickness. These cracks can be due to localized forces that are created between the tape and the wafer, or as a result of forces exerted when the tape is pulled from the front side of the wafer against the adhesive. As a result, a higher rate of failure is seen when wafers are taped and de-taped. Because of the additional steps of taping and de-taping, and of the relatively higher rate of failure of the wafer resulting from the taping and de-taping process, taping and de-taping results in a relatively decreased wafer processing throughput.
Further, because de-taping subjects the wafer to mechanical stresses, and thus limits the thinness of the wafer due to the need to maintain at least some minimum degree of mechanical integrity sufficient to withstand the forces applied during de-taping, minimum wafer thinness has heretofore been limited to 150 to 200 microns.
Further disadvantageously, the taping and de-taping processes add cost due to equipment, and require valuable floor space for taping and de-taping equipment.